1. Field of the Invention
The present invention generally relates to the manufacture of discrete electronic components and, more particularly, to the application of solder to elements included therein such as for formation of connections between a plurality of chip elements and common electrode connections of the device.
2. Description of the Prior Art
While there has been much development of technologies allowing increased device density and variety in integrated circuits in recent years, there remain many applications in electronic devices for which discrete devices are required. In many cases, the needed value of a resistance, capacitance or inductance simply cannot be achieved in a manner consistent with integrated circuit design. In other cases, a discrete device is required to provide sufficient thermal mass or heat dissipation to accommodate currents that the component may be required to carry. Many new technologies and materials have also been developed to improve performance and stability of electrical characteristics of discrete devices while generally reducing size and weight and increasing structural integrity thereof.
Among these technologies, it has become the practice for some types of discrete devices to provide for inclusion of a plurality of more-or-less standardized elements or "chips" in parallel or some other common connection arrangement (e.g. serial and parallel connections in networks to increase heat dissipation). In particular, much increased quality of capacitors in terms of long term stability, breakdown voltage, tolerance and the like has been achieved by the provision of a plurality of chips of specially processed tantalum, barium titanate or other material (to achieve a texture having a high surface area to volume ratio) in parallel between common terminals or connections. The value of the resulting discrete capacitor is thus established as the sum of capacitances of individual chips.
Of course, in this type of discrete device, it is generally preferred to make electrical and mechanical connections between the chips and the common electrodes by soldering since solder metallurgy is well-developed and understood and known to provide mechanically robust, low-resistance connections. However, since the chips are closely spaced to achieve a compact discrete device, the location of the majority of solder joints are made inaccessible, particularly if a plate-type common electrode is used. Therefore, other techniques of assembly and formation of connections (e.g. conductive pastes or adhesives) have often been employed. Nevertheless, construction of such devices using solder pastes together with ovens to achieve solder fusion is known but requires sophisticated and costly solder deposition techniques and operations.
Solder paste deposition has been generally achieved by screening of a paste comprising solder materials in a finely powdered form, an appropriate flux and a binder. The screening process generally has involved the use of costly and delicate metal stencil masks, generally only 0.002 inches thick, which can be easily damaged by contact with the surfaces of discrete chips and which are subjected to wear and other damage by structures adapted to extrude the solder paste therethrough. Moreover, a unique screening mask is generally necessary for each chip layout in number and arrangement of chips. That is, a screening mask must be fabricated for every value and stack configuration of resistor or capacitor which it is desired to produce.
Further, screening using a stencil mask generally results in irregular solder paste application and resultant solder volumes, as deposited or in the completed device. The solder volume is often relatively critical to develop a small solder extrusion or meniscus ideally surrounding and/or filling the solder joint, commonly referred to as a "fillet", at each solder connection, as illustrated at 17 of FIG. 1B. The fillets ideally engender good structural robustness while accommodating some degree of variation in physical dimensions of the chips although the corresponding volume of solder is somewhat greater than necessary for adequate electrical connections to be made. However, the solder volume is also somewhat critical since the excess amount of solder must not be so great as to cause shorting or compromise of the electrical properties of the chip elements. Further, the volume of solder forming the fillet must be controlled within an empirically determined range of volume since mechanical strength will be maximized over a relatively limited range of volume and a tendency toward cracking of the solder joint or the development of voids will increase dramatically with the cycling of mechanical and/or thermal stress if too much or too little solder is present in the joint, as will be discussed in greater detail below.
Moreover, using a screening stencil mask requires two separate operations to deposit paste on opposing surfaces of the chips or on the corresponding sides of the plate electrodes. After completion, flux must generally be removed to avoid corrosion of the device and/or chip elements by the active materials in the flux which, by their nature, attack oxides and can thus compromise stability of electrical characteristics.
Therefore, it can be readily appreciated that known solder deposition processes are costly, inconsistent in results and require significant time and specialized tooling and machinery to accomplish. Thus, known processes for deposition of solder are inadequate to insure high quality and manufacturing yield of such discrete components. Moreover, production of such discrete components is limited by throughput of the solder deposition tools.